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Bilayer Insulator Tunnel Barriers for Graphene-Based Vertical Hot-electron Transistors

机译:基于石墨烯的垂直双层绝缘子隧道势垒   热电子晶体管

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摘要

Vertical graphene-based device concepts that rely on quantum mechanicaltunneling are intensely being discussed in literature for applications inelectronics and optoelectronics. In this work, the carrier transport mechanismsin semiconductor-insulator-graphene (SIG) capacitors are investigated withrespect to their suitability as the electron emitter in vertical graphene basetransistors (GBTs). Several dielectric materials as tunnel barriers arecompared, including dielectric double layers. Using bilayer dielectrics, weexperimentally demonstrate significant improvements in the electron injectioncurrent by promoting Fowler-Nordheim tunneling (FNT) and step tunneling (ST)while suppressing defect mediated carrier transports. High injected tunnelingcurrent densities approaching 10$^3$ A/cm$^2$ (limited by series resistance),and excellent current-voltage nonlinearity and asymmetry are achieved using a 1nm-thick high quality dielectric, thulium silicate (TmSiO), as the firstinsulator layer, and titanium dioxide (TiO$_2$) as a high electron affinitysecond layer insulator. We also confirm the feasibility and effectiveness ofour approach in a full GBT structure which shows dramatic improvement in thecollector on-state current density with respect to the previously reportedGBTs. The device design and the fabrication scheme have been selected withfuture CMOS process compatibility in mind. This work proposes a bilayer tunnelbarrier approach as a promising candidate to be used in high performancevertical graphene-based tunneling devices.
机译:在电子学和光电子学中的应用中,对基于量子力学隧道的垂直石墨烯的器件概念进行了激烈的讨论。在这项工作中,研究了半导体-绝缘体-石墨烯(SIG)电容器中的载流子传输机制是否适合用作垂直石墨烯基晶体管(GBT)中的电子发射器。比较了几种介电材料作为隧道势垒,包括介电双层。使用双层电介质,我们实验证明了通过促进Fowler-Nordheim隧穿(FNT)和阶跃隧穿(ST)同时抑制缺陷介导的载流子传输,可以显着改善电子注入电流。使用1nm厚的高质量电介质硅酸th(TmSiO)可以实现接近10 $ ^ 3 $ A / cm $ ^ 2 $的高注入隧穿电流密度(受串联电阻限制)以及出色的电流-电压非线性和不对称性。第一绝缘层和二氧化钛(TiO $ _2 $)作为高电子亲和力第二层绝缘层。我们还确认了我们的方法在完整的GBT结构中的可行性和有效性,相对于先前报道的GBT,该结构显示了集电极状态电流密度的显着提高。选择器件设计和制造方案时要考虑到未来的CMOS工艺兼容性。这项工作提出了一种双层隧道势垒方法,有望在基于高性能垂直石墨烯的隧道器件中使用。

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